Implementing a Large Data Bus VLIW Microprocessor
نویسندگان
چکیده
منابع مشابه
Viper: a Vliw Integer Microprocessor
This paper describes the design and implementation of a very long instruction word (VLIW) microprocessor. The VIPER (VLIW integer processor) contains four pipelined functional units, and can achieve 0.25 cycle-per-instruction performance. The processor is capable of performing multiway branch operations, two load/store operations or up to four ALU operations in each clock cycle, with full regis...
متن کاملImplementing Hardware Multithreading in a VLIW Architecture
Hardware multithreading is a well-known technique to increase the utilization of processor resources. However, most studies have focused on superscalar processor organizations. This paper analyzes which type of hardware multithreading is most suitable for a VLIW architecture and proposes two buffers to increase the efficiency of hardware multithreading. An important goal of our work is that no ...
متن کاملImplementing MOD bus and CAN bus Protocol Conversion Interface
A number of field buses are available to exchange the serial data among one or more controllers and a number of field devices that are communicating with each other. However, field bus standards are not uniform at present, which brings many difficulties in system design, as different equipments from different manufacturers follow different standards. For a reliable system design there is a need...
متن کاملExtension of the working-zone-encoding method to reduce the energy on the microprocessor data bus
The energy at the I/O pins is a significant part of the overall consumption of a chip. To reduce this energy, this work extends to the data bus the Working Zone Encoding method, originally applied to encoding an external address bus. This method is based on the conjecture that programs favor a few working zones of their address space at each instant and that addresses to consecutive accesses fo...
متن کاملImplementing a Functional/Timing Partitioned Microprocessor Simulator with an FPGA
When creating a microarchitectural simulator, one desires three things: confidence in correctness, speed of design, and speed of simulation. The first requirement is necessary for accurate experimentation. The second impacts the architect’s ability to perform microarchitectural exploration by rapidly describing a range of systems. The third affects the number of simulations that can be profitab...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: American Journal of Applied Sciences
سال: 2008
ISSN: 1546-9239
DOI: 10.3844/ajassp.2008.1528.1534